A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation
A Methodology and Toolset to Enable SystemC and VHDL Co-simulation
IEEE Computer Society Annual Symposium on VLSI (ISVLSI ’07)
18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP ’07)
Rodolfo Jardim de Azevedo
Guido Araújo
Sandro José Rigo
Alexandro Baldassin
Richard Maciel
Fernando Kronbauer