Exploring Cache Size and Core Count Tradeoffs in Systems with Reduced Memory Access Latency
Communication in Shared Memory: Concepts, Definitions, and Efficient Detection
Optimizing memory affinity with a hybrid compiler/OS approach
HIGH LATENCY AND CONTENTION ON SHARED L2-CACHE FOR MANY-CORE ARCHITECTURES
Kernel-Based Thread and Data Mapping for Improved Memory Affinity
Affinity-Based Thread and Data Mapping in Shared Memory Systems
2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)
ACM Computing Surveys
IEEE Transactions on Parallel and Distributed Systems
Parallel Processing Letters
Proceedings of the Computing Frontiers Conference on ZZZ - CF’17
Philippe Olivier Alexandre Navaux
Philippe O. A. Navaux
MATTHIAS Diener
EDUARDO H. M. CRUZ
Hans-Ulrich Heiss
HENRIQUE C. FREITAS